System Verilog Static Class MembersWhen we want to have some variable which we do not want to change its value across whole program and within all instances then static members come in action. Let us take an example like a counter which will count how many times a particular class was instantiated then it isContinueContinue reading “System Verilog Static Class and members”
Tag Archives: Verilog Codes
SPI Working with Verilog Code
SPI Verilog CodeSerial Peripheral Interfacing or simply saying SPI is a communication protocol used between devices to communicate with. They certainly have to talk in the same language or rather say synchronized signals to perform any action.AContinueContinue reading “SPI Working with Verilog Code”
SR Flip Flop Verilog Code
SR Flip Flop Verilog Code The SR or Set-Reset Flip-Flop works a memory storage element. It can store a single bit of memory working with two inputs named set and reset. When the output Q is 0 then the flip-flop is said to be reset and when it is 1 then it is said toContinueContinue reading “SR Flip Flop Verilog Code”
Frequency Divider D Flip Flop Verilog Code
FREQUENCY DIVIDER USING D FLIP FLOPD FF can also be used as a frequency divider where the output frequency becomes exact half to the frequency of the clock signal provided to the D FF. It can be used as a binary divider or “divided by 2” format. This is done by short circuiting the Q’ContinueContinue reading “Frequency Divider D Flip Flop Verilog Code”
Master Slave D Flip Flop Verilog Code
MASTER-SLAVE D FLIP FLOPIn SR flip-flop when the conditions SET and RESET both are 1 that condition is known as a forbidden condition. This tries to change the both Q and Q’ to be 1 and whichever will turn 1 first will further control the latch which is certainly we don’t want. This can beContinueContinue reading “Master Slave D Flip Flop Verilog Code”
Verilog Code for D Flip Flop
D FLIP FLOPD flip flop stands for Delay Flip Flop. It acts as a buffer which delays the output by a clock cycle or as per desired. It’s a bistable multivibrator. D Flip Flop stores a single bit of data at a time. It has two inputs. The first is the D. The second is theContinueContinue reading “Verilog Code for D Flip Flop”
Verilog Code for Carry Look Ahead Adder
CARRY LOOK AHEAD ADDERWhen full adders are used they often introduce a time delay since every single bit addition depends on the carry of previous addition. Hence C4 will wait for C3 and C3 will for C2 and so on. A carry look ahead adder basically reduces the time complexity however increases theContinueContinue reading “Verilog Code for Carry Look Ahead Adder”
Verilog Code for 8bit Full Adder
FULL ADDERHola AmigosAdders as we all have used might pose a problem when simulated for very long space complex projects as the results of full adder are not instant. It does take time and the propagation delay increases with time so how do we deal with delay caused by each gate. Here have a look onContinueContinue reading “Verilog Code for 8bit Full Adder”
Verilog Code for Hamming Code Detector
Hola Amigos,Today I am going to discuss Hamming Code, its parity working and its code detection. Hamming code detection is basically used when there is a single bit error. It is a quite fast and efficient method to determine the error bit and replace it with the opposite bit. Let us take data as – 01001101ContinueContinue reading “Verilog Code for Hamming Code Detector”
Verilog Code for I2C Protocol
[VISIT NEW POST FOR I2C HERE ]I2C PROTOCOLHola AmigosI2C devices have been around us for a long time. If you have done any Arduino projects with any peripherals such as Bluetooth (HC-05) or Gyroscope (MPU6050) or Barometer etc you might be surprised you have already used I2C devices. Yes An I2C basically consists of a master microcontroller andContinueContinue reading “Verilog Code for I2C Protocol”
Shashi's Blog!! 