Tag Archives: Multiplier

VEDIC MULTIPLIERHola AmigosMultiplication in verilog seems an easy task however one must use and appropriate algorithm to save memory, space, RTL complexity, and performance.You all will find certainly various multipliers including the famous booth multiplier. I followed a different algo since I was having a tough time to understand Booth algo. My multiplication follows the methedologyContinueContinue reading “Verilog Code for 8bit Vedic Multiplier”